Reliability- and Security-Aware VLSI System Design for Mission-Critical Applications
Keywords:
Reliability-aware VLSI design, Hardware security, Mission-critical systems, Cross-layer co-design, Fault-tolerant architectures, Secure integrated circuitsAbstract
The aerospace control systems, autonomous vehicles, medical devices, and industrial
automation are some of the area that require very-large-scale integration (VLSI) systems
that have high dependability, security, and predictability. Nevertheless, the traditional
VLSI design processes are usually optimised by considering power performance area
(PPA) only and usually discuss reliability and hardware security as not connected issues
thus result in poor protection and high overheads once implemented in safety and
security-sensitive applications. This paper will introduce a reliability aware and security
aware Vlsi system design model that takes both fault and attack resilience as a multi
state design aspect that looks at all the design levels. The proposed model combines
the cross-layer design methodology across both circuit, architecture and system levels
with a single optimization model that is capable of expressing reliability, security, and
PPA trade-offs under a set of mission-critical constraints. An exemplary case study is
adopted to show rationality of proposed framework and to introduce fault-injection and
security attack models to analyse it completely. Experimental findings on the use of the
design reveal immense improvements in fault coverage and resistance to attacks when
compared to traditional designs along with area, power and delay overheads being
controlled. The given framework offers a modular and stepwise methodology to create
resilient VLSI systems that can sustain the severe requirements of today mission-driven
applications of the next generation.

