Machine Learning–Driven Approaches for Efficient Integrated Circuit Design and Optimization

Abstract

The growing sophistication of contemporary integrated circuits (ICs) due to extreme
technology reduction and the high power/performance/area (PPA) demands have
revealed such deep rooted constraints with the conventional rule-based methodologies
of electronic design automation (EDA). Machine learning (ML) has gained that in the
last few years, it has become a new paradigm to improve design efficiency, optimization
speed, and facilitate decisions made with data throughout the IC design flow. It is a
review of systematic and optimization-focused methods of efficient integrated circuit
design and optimization using machine learning. We present a single mathematical
model of the optimization of ML-assisted IC, emphasising the strategies of surrogate
modelling and the use of reinforcement learning to explore the specifics of multi-objective
design space exploration. The design stage-by-stage review system is performed, which
includes the following stages of architecture exploration, logic synthesis, physical
design, and power, thermal, and reliability optimization stages. In order to generalise
existing literature, a visual analysis model is given, offering an ML-enhanced IC design
process and a full spectrum of taxonomy of learning methods aligning with design
phases and optimization purpose. Representative studies are further compared and
evaluated with respect to the performance increase, scalability, and implementation
issues. Lastly, the critical open challenges such as scarcity of data, generalisation
across technologies, explainability and integration with industrial EDA toolchains are
addressed and future research promising directions are outlined. The purpose of this
review is to provide a unified reference to the researchers and practitioners who want
to use machine learning to design a next-generation VLSI or integrated circuit design
automation.